MySensors Library & Examples  2.3.2
AltSoftSerial_Timers.h
1 /* An Alternative Software Serial Library
2  * http://www.pjrc.com/teensy/td_libs_AltSoftSerial.html
3  * Copyright (c) 2014 PJRC.COM, LLC, Paul Stoffregen, [email protected]
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a copy
6  * of this software and associated documentation files (the "Software"), to deal
7  * in the Software without restriction, including without limitation the rights
8  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9  * copies of the Software, and to permit persons to whom the Software is
10  * furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21  * THE SOFTWARE.
22  */
23 
24 #if defined(ALTSS_USE_TIMER1)
25 #define CONFIG_TIMER_NOPRESCALE() (TIMSK1 = 0, TCCR1A = 0, TCCR1B = (1<<ICNC1) | (1<<CS10))
26 #define CONFIG_TIMER_PRESCALE_8() (TIMSK1 = 0, TCCR1A = 0, TCCR1B = (1<<ICNC1) | (1<<CS11))
27 #define CONFIG_TIMER_PRESCALE_256() (TIMSK1 = 0, TCCR1A = 0, TCCR1B = (1<<ICNC1) | (1<<CS12))
28 #define CONFIG_MATCH_NORMAL() (TCCR1A = TCCR1A & ~((1<<COM1A1) | (1<<COM1A0)))
29 #define CONFIG_MATCH_TOGGLE() (TCCR1A = (TCCR1A & ~(1<<COM1A1)) | (1<<COM1A0))
30 #define CONFIG_MATCH_CLEAR() (TCCR1A = (TCCR1A | (1<<COM1A1)) & ~(1<<COM1A0))
31 #define CONFIG_MATCH_SET() (TCCR1A = TCCR1A | ((1<<COM1A1) | (1<<COM1A0)))
32 #define CONFIG_CAPTURE_FALLING_EDGE() (TCCR1B &= ~(1<<ICES1))
33 #define CONFIG_CAPTURE_RISING_EDGE() (TCCR1B |= (1<<ICES1))
34 #define ENABLE_INT_INPUT_CAPTURE() (TIFR1 = (1<<ICF1), TIMSK1 = (1<<ICIE1))
35 #define ENABLE_INT_COMPARE_A() (TIFR1 = (1<<OCF1A), TIMSK1 |= (1<<OCIE1A))
36 #define ENABLE_INT_COMPARE_B() (TIFR1 = (1<<OCF1B), TIMSK1 |= (1<<OCIE1B))
37 #define DISABLE_INT_INPUT_CAPTURE() (TIMSK1 &= ~(1<<ICIE1))
38 #define DISABLE_INT_COMPARE_A() (TIMSK1 &= ~(1<<OCIE1A))
39 #define DISABLE_INT_COMPARE_B() (TIMSK1 &= ~(1<<OCIE1B))
40 #define GET_TIMER_COUNT() (TCNT1)
41 #define GET_INPUT_CAPTURE() (ICR1)
42 #define GET_COMPARE_A() (OCR1A)
43 #define GET_COMPARE_B() (OCR1B)
44 #define SET_COMPARE_A(val) (OCR1A = (val))
45 #define SET_COMPARE_B(val) (OCR1B = (val))
46 #define CAPTURE_INTERRUPT TIMER1_CAPT_vect
47 #define COMPARE_A_INTERRUPT TIMER1_COMPA_vect
48 #define COMPARE_B_INTERRUPT TIMER1_COMPB_vect
49 
50 
51 #elif defined(ALTSS_USE_TIMER3)
52 #define CONFIG_TIMER_NOPRESCALE() (TIMSK3 = 0, TCCR3A = 0, TCCR3B = (1<<ICNC3) | (1<<CS30))
53 #define CONFIG_TIMER_PRESCALE_8() (TIMSK3 = 0, TCCR3A = 0, TCCR3B = (1<<ICNC3) | (1<<CS31))
54 #define CONFIG_TIMER_PRESCALE_256() (TIMSK3 = 0, TCCR3A = 0, TCCR3B = (1<<ICNC3) | (1<<CS32))
55 #define CONFIG_MATCH_NORMAL() (TCCR3A = TCCR3A & ~((1<<COM3A1) | (1<<COM3A0)))
56 #define CONFIG_MATCH_TOGGLE() (TCCR3A = (TCCR3A & ~(1<<COM3A1)) | (1<<COM3A0))
57 #define CONFIG_MATCH_CLEAR() (TCCR3A = (TCCR3A | (1<<COM3A1)) & ~(1<<COM3A0))
58 #define CONFIG_MATCH_SET() (TCCR3A = TCCR3A | ((1<<COM3A1) | (1<<COM3A0)))
59 #define CONFIG_CAPTURE_FALLING_EDGE() (TCCR3B &= ~(1<<ICES3))
60 #define CONFIG_CAPTURE_RISING_EDGE() (TCCR3B |= (1<<ICES3))
61 #define ENABLE_INT_INPUT_CAPTURE() (TIFR3 = (1<<ICF3), TIMSK3 = (1<<ICIE3))
62 #define ENABLE_INT_COMPARE_A() (TIFR3 = (1<<OCF3A), TIMSK3 |= (1<<OCIE3A))
63 #define ENABLE_INT_COMPARE_B() (TIFR3 = (1<<OCF3B), TIMSK3 |= (1<<OCIE3B))
64 #define DISABLE_INT_INPUT_CAPTURE() (TIMSK3 &= ~(1<<ICIE3))
65 #define DISABLE_INT_COMPARE_A() (TIMSK3 &= ~(1<<OCIE3A))
66 #define DISABLE_INT_COMPARE_B() (TIMSK3 &= ~(1<<OCIE3B))
67 #define GET_TIMER_COUNT() (TCNT3)
68 #define GET_INPUT_CAPTURE() (ICR3)
69 #define GET_COMPARE_A() (OCR3A)
70 #define GET_COMPARE_B() (OCR3B)
71 #define SET_COMPARE_A(val) (OCR3A = (val))
72 #define SET_COMPARE_B(val) (OCR3B = (val))
73 #define CAPTURE_INTERRUPT TIMER3_CAPT_vect
74 #define COMPARE_A_INTERRUPT TIMER3_COMPA_vect
75 #define COMPARE_B_INTERRUPT TIMER3_COMPB_vect
76 
77 
78 #elif defined(ALTSS_USE_TIMER4)
79 #define CONFIG_TIMER_NOPRESCALE() (TIMSK4 = 0, TCCR4A = 0, TCCR4B = (1<<ICNC4) | (1<<CS40))
80 #define CONFIG_TIMER_PRESCALE_8() (TIMSK4 = 0, TCCR4A = 0, TCCR4B = (1<<ICNC4) | (1<<CS41))
81 #define CONFIG_TIMER_PRESCALE_256() (TIMSK4 = 0, TCCR4A = 0, TCCR4B = (1<<ICNC4) | (1<<CS42))
82 #define CONFIG_MATCH_NORMAL() (TCCR4A = TCCR4A & ~((1<<COM4A1) | (1<<COM4A0)))
83 #define CONFIG_MATCH_TOGGLE() (TCCR4A = (TCCR4A & ~(1<<COM4A1)) | (1<<COM4A0))
84 #define CONFIG_MATCH_CLEAR() (TCCR4A = (TCCR4A | (1<<COM4A1)) & ~(1<<COM4A0))
85 #define CONFIG_MATCH_SET() (TCCR4A = TCCR4A | ((1<<COM4A1) | (1<<COM4A0)))
86 #define CONFIG_CAPTURE_FALLING_EDGE() (TCCR4B &= ~(1<<ICES4))
87 #define CONFIG_CAPTURE_RISING_EDGE() (TCCR4B |= (1<<ICES4))
88 #define ENABLE_INT_INPUT_CAPTURE() (TIFR4 = (1<<ICF4), TIMSK4 = (1<<ICIE4))
89 #define ENABLE_INT_COMPARE_A() (TIFR4 = (1<<OCF4A), TIMSK4 |= (1<<OCIE4A))
90 #define ENABLE_INT_COMPARE_B() (TIFR4 = (1<<OCF4B), TIMSK4 |= (1<<OCIE4B))
91 #define DISABLE_INT_INPUT_CAPTURE() (TIMSK4 &= ~(1<<ICIE4))
92 #define DISABLE_INT_COMPARE_A() (TIMSK4 &= ~(1<<OCIE4A))
93 #define DISABLE_INT_COMPARE_B() (TIMSK4 &= ~(1<<OCIE4B))
94 #define GET_TIMER_COUNT() (TCNT4)
95 #define GET_INPUT_CAPTURE() (ICR4)
96 #define GET_COMPARE_A() (OCR4A)
97 #define GET_COMPARE_B() (OCR4B)
98 #define SET_COMPARE_A(val) (OCR4A = (val))
99 #define SET_COMPARE_B(val) (OCR4B = (val))
100 #define CAPTURE_INTERRUPT TIMER4_CAPT_vect
101 #define COMPARE_A_INTERRUPT TIMER4_COMPA_vect
102 #define COMPARE_B_INTERRUPT TIMER4_COMPB_vect
103 
104 
105 #elif defined(ALTSS_USE_TIMER5)
106 #define CONFIG_TIMER_NOPRESCALE() (TIMSK5 = 0, TCCR5A = 0, TCCR5B = (1<<ICNC5) | (1<<CS50))
107 #define CONFIG_TIMER_PRESCALE_8() (TIMSK5 = 0, TCCR5A = 0, TCCR5B = (1<<ICNC5) | (1<<CS51))
108 #define CONFIG_TIMER_PRESCALE_256() (TIMSK5 = 0, TCCR5A = 0, TCCR5B = (1<<ICNC5) | (1<<CS52))
109 #define CONFIG_MATCH_NORMAL() (TCCR5A = TCCR5A & ~((1<<COM5A1) | (1<<COM5A0)))
110 #define CONFIG_MATCH_TOGGLE() (TCCR5A = (TCCR5A & ~(1<<COM5A1)) | (1<<COM5A0))
111 #define CONFIG_MATCH_CLEAR() (TCCR5A = (TCCR5A | (1<<COM5A1)) & ~(1<<COM5A0))
112 #define CONFIG_MATCH_SET() (TCCR5A = TCCR5A | ((1<<COM5A1) | (1<<COM5A0)))
113 #define CONFIG_CAPTURE_FALLING_EDGE() (TCCR5B &= ~(1<<ICES5))
114 #define CONFIG_CAPTURE_RISING_EDGE() (TCCR5B |= (1<<ICES5))
115 #define ENABLE_INT_INPUT_CAPTURE() (TIFR5 = (1<<ICF5), TIMSK5 = (1<<ICIE5))
116 #define ENABLE_INT_COMPARE_A() (TIFR5 = (1<<OCF5A), TIMSK5 |= (1<<OCIE5A))
117 #define ENABLE_INT_COMPARE_B() (TIFR5 = (1<<OCF5B), TIMSK5 |= (1<<OCIE5B))
118 #define DISABLE_INT_INPUT_CAPTURE() (TIMSK5 &= ~(1<<ICIE5))
119 #define DISABLE_INT_COMPARE_A() (TIMSK5 &= ~(1<<OCIE5A))
120 #define DISABLE_INT_COMPARE_B() (TIMSK5 &= ~(1<<OCIE5B))
121 #define GET_TIMER_COUNT() (TCNT5)
122 #define GET_INPUT_CAPTURE() (ICR5)
123 #define GET_COMPARE_A() (OCR5A)
124 #define GET_COMPARE_B() (OCR5B)
125 #define SET_COMPARE_A(val) (OCR5A = (val))
126 #define SET_COMPARE_B(val) (OCR5B = (val))
127 #define CAPTURE_INTERRUPT TIMER5_CAPT_vect
128 #define COMPARE_A_INTERRUPT TIMER5_COMPA_vect
129 #define COMPARE_B_INTERRUPT TIMER5_COMPB_vect
130 
131 
132 #elif defined(ALTSS_USE_FTM0)
133 // CH5 = input capture (input, pin 20)
134 // CH6 = compare a (output, pin 21)
135 // CH0 = compare b (input timeout)
136 #define CONFIG_TIMER_NOPRESCALE() FTM0_SC = 0; FTM0_CNT = 0; FTM0_MOD = 0xFFFF; \
137  FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(0); \
138  digitalWriteFast(21, HIGH); \
139  NVIC_SET_PRIORITY(IRQ_FTM0, 48); \
140  FTM0_C0SC = 0x18; \
141  NVIC_ENABLE_IRQ(IRQ_FTM0);
142 #define CONFIG_TIMER_PRESCALE_8() FTM0_SC = 0; FTM0_CNT = 0; FTM0_MOD = 0xFFFF; \
143  FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(3); \
144  digitalWriteFast(21, HIGH); \
145  NVIC_SET_PRIORITY(IRQ_FTM0, 48); \
146  FTM0_C0SC = 0x18; \
147  NVIC_ENABLE_IRQ(IRQ_FTM0);
148 #define CONFIG_TIMER_PRESCALE_128() FTM0_SC = 0; FTM0_CNT = 0; FTM0_MOD = 0xFFFF; \
149  FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(7); \
150  digitalWriteFast(21, HIGH); \
151  NVIC_SET_PRIORITY(IRQ_FTM0, 48); \
152  FTM0_C0SC = 0x18; \
153  NVIC_ENABLE_IRQ(IRQ_FTM0);
154 #define CONFIG_MATCH_NORMAL() (FTM0_C6SC = 0)
155 #define CONFIG_MATCH_TOGGLE() (FTM0_C6SC = (FTM0_C6SC & 0xC3) | 0x14)
156 #define CONFIG_MATCH_CLEAR() (FTM0_C6SC = (FTM0_C6SC & 0xC3) | 0x18)
157 #define CONFIG_MATCH_SET() (FTM0_C6SC = (FTM0_C6SC & 0xC3) | 0x1C)
158 #define CONFIG_CAPTURE_FALLING_EDGE() (FTM0_C5SC = (FTM0_C5SC & 0xC3) | 0x08)
159 #define CONFIG_CAPTURE_RISING_EDGE() (FTM0_C5SC = (FTM0_C5SC & 0xC3) | 0x04)
160 #define ENABLE_INT_INPUT_CAPTURE() FTM0_C5SC = 0x48; \
161  CORE_PIN20_CONFIG = PORT_PCR_MUX(4)|PORT_PCR_PE|PORT_PCR_PS
162 #define ENABLE_INT_COMPARE_A() FTM0_C6SC |= 0x40; \
163  CORE_PIN21_CONFIG = PORT_PCR_MUX(4)|PORT_PCR_DSE|PORT_PCR_SRE
164 #define ENABLE_INT_COMPARE_B() (FTM0_C0SC = 0x58)
165 #define DISABLE_INT_INPUT_CAPTURE() FTM0_C5SC &= ~0x40; \
166  CORE_PIN20_CONFIG = PORT_PCR_MUX(1)|PORT_PCR_PE|PORT_PCR_PS
167 #define DISABLE_INT_COMPARE_A() FTM0_C6SC &= ~0x40; \
168  CORE_PIN21_CONFIG = PORT_PCR_MUX(1)|PORT_PCR_DSE|PORT_PCR_SRE; \
169  digitalWriteFast(21, HIGH)
170 #define DISABLE_INT_COMPARE_B() (FTM0_C0SC &= ~0x40)
171 #define GET_TIMER_COUNT() (FTM0_CNT)
172 #define GET_INPUT_CAPTURE() (FTM0_C5V)
173 #define GET_COMPARE_A() (FTM0_C6V)
174 #define GET_COMPARE_B() (FTM0_C0V)
175 #define SET_COMPARE_A(val) (FTM0_C6V = val)
176 #define SET_COMPARE_B(val) if (FTM0_C0SC & FTM_CSC_CHF) FTM0_C0SC = 0x18; \
177  do { FTM0_C0V = (val); } while (FTM0_C0V != (val));
178 #define CAPTURE_INTERRUPT altss_capture_interrupt
179 #define COMPARE_A_INTERRUPT altss_compare_a_interrupt
180 #define COMPARE_B_INTERRUPT altss_compare_b_interrupt
181 #ifdef ISR
182 #undef ISR
183 #endif
184 #define ISR(f) static void f (void)
185 
186 
187 #endif